Neuromorphic silicon & brain-native AI

Memory
that thinks.

We're building MNEMOS, a neuromorphic processor where storage is the processor, and SOMA, AI models whose neurons spike, rewire and learn while they run. It's modelled on the 20-watt computer in your head.

Inside the chip How the brain does it
External RAM
0GB
Full-load power
20–40W
Weight movement
≈0bytes
Learning
Liveon-chip

01 — The wall

Today's AI spends most of its energy moving data around.

Every computer since 1945 keeps memory and processing in separate places. To do one multiply, a GPU fetches the weight from RAM, carries it across a bus, computes, and writes the result back, billions of times per token. The fetching costs far more than the maths. This is the von Neumann bottleneck, and it's why one rack of AI accelerators draws more power than a street of houses.

TodayVon Neumann machine
PROCESSOR waits… RAM the bus: every weight, every token

Data commutes. Energy is spent on the trip.

MNEMOSCompute-in-memory fabric
every cell stores a weight and computes with it

Data stays put. The maths happens where it lives.

≈170×

more energy to fetch a 32-bit word from DRAM (≈640 pJ) than to multiply it (≈3.7 pJ).

45 nm figures, Horowitz, ISSCC 2014

~20W

is what the human brain uses to run ~86 billion neurons and learn continuously.

Raichle & Gusnard, PNAS 2002 · Azevedo et al. 2009

700W

for a single flagship datacenter GPU, before networking, RAM and cooling. Large models need thousands.

NVIDIA H100 SXM, max TDP

02 — The blueprint

The brain never separated memory from thinking.

In your head, a memory isn't stored in one place and processed in another. It's the strength of the connections between neurons. Remembering, computing and learning all happen in the same physical synapses, triggered only by sparse electrical spikes. Hover a region to see how each one maps onto our silicon.

Tap or hover a region · click anywhere to fire a thought

86billion neurons
~1014synapses: memory & compute
~20 Wtotal power budget
0.1–10 Hztypical firing: mostly silent
No clockevents, not cycles
No RAMstate lives in the network

One neuron, two substrates

Follow a signal through a biological neuron. Every stage has a direct counterpart in MNEMOS circuitry.

DENDRITES SOMA AXON SYNAPSES
Membrane potential · leaky integrate-and-firethreshold
  1. Dendrites→Crossbar row lines carry input voltage
  2. Synapse strength→Memory-cell conductance G = the weight
  3. Soma integrates→Capacitor sums column current, leaks over time
  4. Threshold → spike→Comparator fires a 1-bit event and resets
  5. Axon→Asynchronous router sends a tiny address packet
  6. Plasticity→Programming pulses nudge G in place

03 — MNEMOS-1

A processor made of memory. Storage is the compute.

MNEMOS (from Mnemosyne, the Greek goddess of memory) is our neuromorphic processor architecture. There's no CPU next to a memory bank. Instead there's one fabric of neuro-cores, each of which stores synaptic weights and computes with them in the same place. Scroll through how it works.

MNEMOS-1 · assembled

  1. 01

    One fabric, not two

    MNEMOS-1 is a grid of neuro-cores. Each core is memory and processor at once. There's no CPU, no cache hierarchy, and no DRAM chips on the board, so a weight never has to travel anywhere.

  2. 02

    Four layers, one job

    Pull the stack apart: synaptic memory arrays hold the weights, neuron circuits integrate and fire, a spike router carries events between cores, and a plasticity engine rewrites weights while the chip runs.

  3. 03

    Weights are stored as conductance

    Every synapse is a non-volatile analog memory cell (ReRAM / PCM-class) whose electrical conductance G is the weight. The model isn't loaded into the chip. It's physically written into it, the way your memories are written into synapses.

  4. 04

    Physics does the maths

    An incoming spike drives voltage V onto a row. By Ohm's law each cell passes current I = G·V, which is the multiply. By Kirchhoff's law the currents on a column add up, which is the accumulate. A whole matrix-vector product settles in one analog step, in place, without fetching a single weight.

  5. 05

    Neurons integrate and fire

    Column current charges a tiny capacitor, the neuron's membrane. It leaks slowly. When it crosses threshold, the circuit emits a spike, resets, and rests for a refractory moment, exactly like a biological soma.

  6. 06

    Only spikes travel, and only when needed

    A spike is a few bits of address sent across an asynchronous mesh to its target cores. There's no global clock, so silent neurons draw almost nothing. With 1–5 % of neurons active at any instant, most of the chip is dark most of the time, which is how a 20–40 W envelope covers full load.

  7. 07

    It learns while it runs

    Local plasticity circuits watch spike timing. If the input fired just before the output, the connection strengthens; if just after, it weakens (STDP). A global neuromodulator signal, our version of dopamine, decides which changes stick. The weights are alive.

  8. 08

    Switch it off. It remembers.

    Because the synapses are non-volatile, the model and everything it has learned survive with zero power. It's instant-on, with no boot-time weight loading and no RAM to refill. It wakes up and picks up exactly where it left off.

Try it · in-memory compute

Fire the inputs. Watch Ohm and Kirchhoff do the maths.

Each square is a synapse; brighter means higher conductance G. Toggle input spikes on the left. Every column's current I = Σ G·V flows into a neuron that integrates, leaks and fires. Click a synapse to reprogram its weight.

Active rows
0 / 6
Weights moved
0 bytes
Output spikes
0

MNEMOS-1 · target specification

Design targets · pre-silicon

Architecture
Analog compute-in-memory, spiking neuro-cores
Synaptic memory
Non-volatile multi-level cells (ReRAM / PCM-class)
External DRAM
None. Weights and state live on-fabric
Power envelope
20–40 W at full load · µW–mW when idle
Latency
Single analog settle per layer: no fetch, no decode
Interconnect
Asynchronous address-event 2D mesh, clockless
Learning
On-chip STDP + three-factor neuromodulated rules
Persistence
Instant-on; weights survive power-off

Brain vs. MNEMOS vs. today's AI hardware

Human brainMNEMOS-1 targetGPU + DRAM
Where memory livesIn synapsesIn synaptic cellsSeparate RAM chips
Where compute happensIn the same synapsesIn the same cellsSeparate cores
Data movement per opNone≈ NoneEvery weight, every step
TimingEvent-driven, no clockEvent-driven, clocklessGHz global clock
ActivitySparse spikesSparse spikes (1–5 %)Dense: all units, all steps
LearningContinuous, localContinuous, on-chipOffline, in a datacenter
After power-offN/A (always on)Remembers everythingRAM wiped, reload model
Power~20 W20–40 W700 W per GPU

04 — SOMA models

AI that works the way neurons work.

SOMA (Spiking · Online-learning · Memory-resident · Adaptive) is our family of brain-native models, built to run natively on MNEMOS. A transformer recomputes every weight for every token and never changes after training. SOMA neurons spike only when they have something to say, and their connections strengthen, weaken, grow and disappear as they run.

Neurons0
Synapses0
Spikes / s0
Active now0%
Formed / pruned0 / 0
Click the network to stimulate it

Neuron (glows when it spikes)

Synapse (thickness = weight)

Newly grown connection

Spike in flight

Spiking neurons

Information in time, not just in numbers

Each SOMA unit is a leaky integrate-and-fire neuron with adaptive threshold. It communicates with discrete spikes, so meaning is carried by which neurons fire and when.

Dynamic weights

Neurons that fire together, wire together

Spike-timing-dependent plasticity updates every synapse locally, during inference. Inputs that help predict a neuron's firing gain influence; ones that don't fade.

Structural plasticity

The graph rewires itself

New synapses sprout between co-active neurons and unused ones are pruned, the way a child's brain refines itself. Architecture becomes something the model learns.

Neuromodulation

A dopamine signal for learning

Three-factor learning: local spike timing proposes a change, a global reward or surprise signal approves it. That gives credit assignment without backprop through the whole network.

Memory without RAM

Context lives in the network itself

Short-term context is held in membrane potentials and fast synapses, and long-term knowledge in non-volatile conductances. There's no KV cache and no weight streaming.

Sleep & consolidation

Learn today, keep it forever

Idle-time replay moves fresh, fast-changing memories into stable long-term synapses, much as the hippocampus does during sleep, so new skills don't erase old ones.

Transformer on a GPU

  • Every token touches every weight
  • Weights frozen after training
  • Context in a KV cache in RAM
  • Learns offline, in a datacenter
  • Fixed, hand-designed graph
vs

SOMA on MNEMOS

  • Only spiking paths do any work
  • Weights adapt while it runs
  • Context in neuron & synapse state
  • Learns on-device, continuously
  • Connections grow and prune themselves

05 — The road to brain-scale intelligence

From a spiking neuron to a mind that learns like ours.

Artificial superintelligence won't come from making datacenters bigger. We think it comes from systems that learn continuously, remember without forgetting, and reason on a brain's energy budget. Here's how we get there.

  1. Phase 0 · Now

    SOMA in simulation

    Spiking models, plasticity rules and neuromodulated learning, developed and benchmarked in software. Our metric is intelligence per watt.

  2. Phase 1

    Neuro-core on FPGA

    A digital twin of a MNEMOS core: LIF neuron circuits, address-event router and on-chip STDP, running real SOMA networks in hardware.

  3. Phase 2

    Analog test silicon

    A memristive crossbar test chip to characterise multi-level conductance, drift, write endurance and energy per synaptic event.

  4. Phase 3

    MNEMOS-1

    A multi-core neuromorphic processor in a 20–40 W envelope, with SOMA models running natively. The first DUM-E agents run on it with no RAM.

  5. Phase 4

    Brain-scale fabrics

    Tiled MNEMOS systems scaling toward cortical neuron counts, with agents that keep learning for years without retraining.

  6. Horizon

    Human-like general intelligence, then beyond

    Minds that perceive, remember, reason and adapt the way people do, at the energy of a human brain. That's our path to artificial superintelligence.

06 — The lab

A small lab with a very large goal.

DUM-E Labs is an independent research lab working at the boundary of neuroscience, analog circuit design and machine learning. If you think in spikes, synapses, or sense amplifiers, we'd like to build with you.

Dummie-Labs on GitHub Lab notes

Kucharlapati Sri Rishikesh Varma

Founder & lead researcher

@rishikeshvarma LinkedIn

We're looking for

  • Analog / mixed-signal circuit designers
  • Spiking neural network researchers
  • FPGA & digital design engineers
  • Computational neuroscientists
  • Systems & compiler engineers

Also from the lab

DUM-E is our on-device AI agent. Today it runs on consumer GPUs. It will be the first workload ported to SOMA on MNEMOS.